SoC FPGA Bootloader Development
Bootloader development for Intel® and Xilinx® SoC FPGAs to utilize your Hardware in a highly integrated way.
The multi-stage Bootloader system of modern SoC FPGAs enable not only to load an OS on an Application Processor system
it can also be used to add advanced security- and reliability- layers to the overall system.
- Denx u-boot based Bootloader development based on the Design requirements of the SoC FPGAs
- Boot Scripts Design (e.g. for writing the FPGA-Fabric during boot)
- Various boot sources (e.g. eMMC, QSPI,..)
- Secure boot and secure FPGA-Fabric authorization
- Hardware monitoring during boot
- FPGA Partial Reconfiguration (e.g. Intel® Arria® 10 SX Early I/O)
- Recovery and update mode implementation
Used SoC FPGA Design Tools
- OpenEmbedded Yocto Project
- Intel® Embedded Development Suite (SoC EDS)
- Xilinx® Petalinux
- Xilinx® Vitis™ Integrated Design Environment
- Arm® Development Studio (DS-5)
- Arm® Streamline
- cmake, C++, gcc, Arm® Assembly, ...