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Shared System Memory Design

Shared System Memory (SDRAM) (e.g. DDR3/DDR4) is a concept of SoC FPGAs that uses a single memory pool for FPGA Soft-IP modules and for the Arm® Processor System.

Shared Memory SoC FPGA system


Benefits of shared System Memory

instead of two independent system Memory sources for the FPGA- and Arm® World

  • Reduced board complexity and bill of materials with a single Memory system
  • High-level merging of the Arm® Processor System and the FPGA-Fabric by allowing Embedded Linux to access FPGA Memory space
  • Utilization of high-speed shared Memory interfaces between FPGA- and Arm® World

Our experience shows that a complex and wide range Design effort is required to achieve a high Memory performance that does not limit the FPGA-Fabric. It contains for instance the fields FPGA interface-, Linux Bootloader, Linux Kernel Design with an advanced Optimization.

We have a high-level experience with the External Memory Interface (EMIF) of the Intel® Arria® 10- and Intel® Agilex™ series and with Memory designs of the Intel® Cyclone® V family.


Service Portfolio

  • System Memory (SDRAM) (DDR3,DDR4) conception and performance pre-calculation to achieve the required performance
  • System Memory Controller (SDRAM) configuration for High-End Intel® ® FPGAs
  • Implementation of advanced Memory Optimization features, such as Memory pre-charge and bank interleaving
  • System Memory Controller debugging, calibration and Simulation
  • Linux Bootloader and Linux Kernel Optimization with custom Linux Kernel Drivers for the highest shared system Memory performance
  • High-speed Arm® AMBA® AXI Bridge Interface Design for shared Memory data exchange
  • DMA implementation (e.g. modular Scatter-Gather Direct Memory Access (mSGDMA))

Used Tools

  • Intel® Quartus® Prime
  • Intel® External Memory Interface Toolkit (for the Intel® Arria® 10 SX)
  • MentorGraphics® (Siemens® EDA) ModelSim™
  • Arm® Development Studio (DS-5) with Streamline
  • OpenEmbbedded Yocto Project
  • cocotb (for Python-based Testbench Design and Simulation)
  • TCL- and Python-Scripts (for system verification, build automation,...)
  • MathWorks® MATLAB™ (for Simulation input file generation)