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SoC FPGAs ...

SoC FPGA general Diagram #1

... combine the advantages of a highly flexible programmable logic device (PLD) with powerful Arm® processor systems, as known from the mobile world in a single package.

PLDs/FPGAs can compute faster than any computer because they execute their applications directly in Hardware. They are able to load almost any digital logic such as sensor interfaces, microprocessors and AI engines. The limitless flexibility of FPGAs enables them to be used in areas where any other cost-optimized technologies fail. SoC FPGAs can take the capabilities of FPGAs with their hard processor system to the next level by enabling them to run industry-leading Embedded Linux. Linux, for example, can control, process and monitor FPGA data and stay in touch with the desktop world by hosting a cloud update manager that can update not only the embedded software but also all Hardware embedded in the FPGA to fulfill new requirements in the field. As a result, SoC FPGA can extend the product life, reduce waste and enable more user-friendly and profitable service business models.

SoC FPGAs are considered to be the family of the most complex silicon components on the market that require enormous development efforts. Because of their complexities, many projects are designed with easier technologies by removing many features. Therefore, many areas of Application are denied.

rsyocto was founded to take over and automate the complex SoC FPGA development so that its partners can focus on their big thing by getting their applications accelerated with groundbreaking SoC FPGAs.

rsyocto product development life cycle diagram

SoC FPGA Interface Design

High-level experience with the following SoC FPGAs

  • Intel® Cyclone® V SE/ST/SX SoC FPGA
  • Intel® Arria® 10 SX SoC FPGA
  • Intel® Agilex™ 7 F-Series SoC FPGA

High-Speed interface development between Sensors and Actuators, Memory, the FPGA-Fabric, Real-Time processors and Arm® (Cortex®-A) Application Processors.

e.g. via.:

  • Arm® AMBA® AXI /Intel® Avalon® Memory Mapped (MM) and Streaming (ST) Bus Interfaces

  • Real-Time Soft-Core Processors

  • Interrupt driven Linux Kernel Mode Drivers

  • Direct memory access (DMA)

  • Highly optimized shared system Memory (SDRAM)

SoC FPGA Demo Application diagram

Embedded Reference Linux Distribution rsyocto

rsyocto Embedded Linux Distribution Block diagram

Especially for Intel® SoC FPGAs and the requirements of modern scientific and industrial use-cases an optimized Embedded Linux Distribution was designed with the OpenEmbedded Yocto Project. The Board Support Package (BSP) meta layer, containing high-level Linux drivers for the Yocto Project and Intel® SoC FPGAs, is officially maintained by us. This Linux Distribution with its integrated Build System can be used as a reference point for fulfilling the customers needs.

Features and Options

  • Full utilization of the Arm®-based (Arm®v7-A, Arm®v8-A,) Application Processors embedded inside Intel® SoC-FPGAs with an adapted Linux Kernel
  • Optimized Memory Footprint for various boot sources and with RAM-Disk support
  • High-End SoC FPGA Network-on-Chip Interconnect Firewall support
  • Linux Kernel Drivers for the entire Hard-IP Interfaces (e.g. CAN, Watchdog, Ethernet,...) are implemented
  • Drivers for all Arm® AMBA® AXI Bridge Interfaces between the FPGA- and Arm®-World (inc. DMA) are accessible
  • Optional integration of an Intel® Nios® II Soft-Core Processor running a real-time OS (e.g. FreeRTOS) is available
  • High-Speed shared DDR3/DDR4 Memory Interface between Linux and FPGA Soft-IP is optionally deliverable
  • FPGA Configuration can be written and monitored during boot or by Linux
  • Arm® and Intel® embedded Software and Hardware tools are out of the box supported
  • Management Web or Desktop Interfaces are optionally obtainable
  • Embedded Software, Updates and Linux Packages, like Development Tools, can be added or removed according to customer requirements
  • The integrated Embedded native remote development environment simplifies the Linux Software development in the team

Build System for generating a highly-optimized SoC FPGA solution

For simplifying the complex SoC FPGA build flow for high-level merging of a FPGA Design project with a custom bootable Linux Distribution a fully automated Python based Build System was specially

integrated into the rsyocto Linux Distribution.

It accelerates the capabilities of the Intel® Development tools and the OpenEmbedded Yocto Project. The Build System can be easily integrated into various product cycle stages such as development and production.

rsyocto Embedded Linux Distribution Design Flow Diagram

Embedded Systems and Desktop Integration

High-Speed Interface and Embedded Software development between Embedded Systems and Desktop/Cloud to bring both worlds together. We can take over the entire Design to connect any FPGA interface or accelerator Soft-IP with the desktop environment.

e.g. by developing:

  • PCIe or USB Microsoft® Windows™ Kernel Mode Drivers (KMDF) with the Windows® Driver Development Kit (WDK)
  • Windows™ Service development for executing real-time and latency critical code
  • Complex Windows® Desktop GUI Application development (WPF C#)
SoC FPGA demo block Diagram

 FPGA Interface Development 

SuperSpeed USB 3.0 peripheral interfaces →

Fieldbuses (e.g. CAN) →

High-Speed transceiver interfaces (e.g. 10GbE) →

1Gb Ethernet interfaces →

SoC FPGA Interface Design Board left
SoC FPGA Interface Design Board right

← SDRAM interfaces (z.g. DDR3/DDR4)

← PCIe interfaces

Robin Sebastian, rsyocto founder

rsyocto GmbH & Co. KG

Robin Sebastian, M.Sc.

"Start by doing what's necessary; then do what's possible; and suddenly you are doing the impossible."

(Francis of Assisi)

We connect different worlds, create incredible things tailored to you.